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用于 RRAM 设计垂直结构的石墨烯/六方氮化硼异质结。

Graphene/h-BN Heterostructures for Vertical Architecture of RRAM Design.

机构信息

Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan.

出版信息

Sci Rep. 2017 Aug 29;7(1):9679. doi: 10.1038/s41598-017-08939-2.

Abstract

The development of RRAM is one of the mainstreams for next generation non-volatile memories to replace the conventional charge-based flash memory. More importantly, the simpler structure of RRAM makes it feasible to be integrated into a passive crossbar array for high-density memory applications. By stacking up the crossbar arrays, the ultra-high density of 3D horizontal RRAM (3D-HRAM) can be realized. However, 3D-HRAM requires critical lithography and other process for every stacked layer, and this fabrication cost overhead increases linearly with the number of stacks. Here, it is demonstrated that the 2D material-based vertical RRAM structure composed of graphene plane electrode/multilayer h-BN insulating dielectric stacked layers, AlO/TiO resistive switching layer and ITO pillar electrode exhibits reliable device performance including forming-free, low power consumption (P = ~2 μW and P = ~0.2 μW), and large memory window (>300). The scanning transmission electron microscopy indicates that the thickness of multilayer h-BN is around 2 nm. Due to the ultrathin-insulating dielectric and naturally high thermal conductivity characteristics of h-BN, the vertical structure combining the graphene plane electrode with multilayer h-BN insulating dielectric can pave the way toward a new area of ultra high-density memory integration in the future.

摘要

RRAM 的发展是下一代非易失性存储器取代传统基于电荷的闪存的主流技术之一。更重要的是,RRAM 的结构更为简单,使其可以集成到无源交叉阵列中,用于高密度存储器应用。通过堆叠交叉阵列,可以实现超高密度的三维水平 RRAM(3D-HRAM)。然而,3D-HRAM 每个堆叠层都需要关键的光刻和其他工艺,并且这种制造成本开销会随着堆叠层数的增加而呈线性增加。在这里,展示了由石墨烯平面电极/多层 h-BN 绝缘介电堆叠层、AlO/TiO 电阻开关层和 ITO 柱电极组成的基于二维材料的垂直 RRAM 结构,该结构具有可靠的器件性能,包括无形成、低功耗(P=2μW 和 P=0.2μW)和大存储窗口(>300)。扫描透射电子显微镜表明,多层 h-BN 的厚度约为 2nm。由于 h-BN 的绝缘层非常薄且具有天然的高热导率特性,因此将石墨烯平面电极与多层 h-BN 绝缘介电层相结合的垂直结构为未来超高密度存储器集成开辟了新的途径。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/27f0/5575158/a501739450b6/41598_2017_8939_Fig1_HTML.jpg

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