Kwon Gihyeon, Kim Hyeon-Sik, Jeong Kwangsik, Oh Sewoong, Kim Dajung, Koh Woochan, Park Hyunjun, Im Seongil, Cho Mann-Ho
Department of Physics, Yonsei University, Seoul 03722, Republic of Korea.
Department of Chemistry and Biochemistry, University of California, Los Angeles, California 90095, United States.
ACS Nano. 2025 Jan 14;19(1):1619-1629. doi: 10.1021/acsnano.4c15117. Epub 2024 Dec 21.
To achieve the commercialization of two-dimensional (2D) semiconductors, the identification of an appropriate combination of 2D semiconductors and three-dimensional (3D) metals is crucial. Furthermore, understanding the van der Waals (vdW) interactions between these materials in thin-film semiconductor processes is essential. Optimizing these interactions requires precise control over the properties of the vdW interface through specific pre- or post-treatment methods. This study utilizes Se-environment annealing as a post-treatment technique, which allows for modification of the vdW gap distance and enhancement of the stability of the interfacial structure through the process of Se intercalation and deintercalation at the 2D-3D interface. The depth of Se intercalation and deintercalation is adjusted by varying the temperature and duration of the postannealing process in an Se environment. This precise control over the process enables the effective metallization of 2D semiconductors. The results indicate that expanding the vdW gap and stabilizing the interface structure through this post-treatment significantly improve the metal contact properties in devices such as field-effect transistors and photovoltaic Schottky diodes by minimizing metal-induced gap states, thus reducing Fermi level pinning. The application of Se intercalation and deintercalation techniques achieves an exceptionally low contact resistance of 773 Ω·μm between p-type WSe and Au. Additionally, the integration of doping-free WSe complementary metal-oxide-semiconductor (CMOS) circuits using Se-environment annealing and blocking layers is demonstrated, establishing a promising advancement in semiconductor technology.
为实现二维（2D）半导体的商业化，确定二维半导体与三维（3D）金属的合适组合至关重要。此外，了解这些材料在薄膜半导体工艺中的范德华（vdW）相互作用也必不可少。通过特定的预处理或后处理方法精确控制vdW界面的性质对于优化这些相互作用至关重要。本研究采用硒环境退火作为后处理技术，通过在二维-三维界面处进行硒的嵌入和脱嵌过程，可改变vdW间隙距离并增强界面结构的稳定性。通过改变在硒环境中后退火过程的温度和持续时间来调整硒嵌入和脱嵌的深度。对该过程的精确控制能够实现二维半导体的有效金属化。结果表明，通过这种后处理扩大vdW间隙并稳定界面结构，可通过最小化金属诱导的间隙态显著改善场效应晶体管和光伏肖特基二极管等器件中的金属接触性能，从而减少费米能级钉扎。硒嵌入和脱嵌技术的应用实现了p型WSe与Au之间773Ω·μm的极低接触电阻。此外，还展示了使用硒环境退火和阻挡层集成无掺杂WSe互补金属氧化物半导体（CMOS）电路，这在半导体技术方面取得了有前景的进展。
