Cho Hyojong, Kim Sungjun
Division of Electronics and Electrical Engineering, Dongguk University, Seoul 04620, Korea.
Nanomaterials (Basel). 2020 Sep 12;10(9):1821. doi: 10.3390/nano10091821.
In this study, we investigated the synaptic functions of TiN/Ti/TiO/SiO/Si resistive random access memory for a neuromorphic computing system that can act as a substitute for the von-Neumann computing architecture. To process the data efficiently, it is necessary to coordinate the information that needs to be processed with short-term memory. In neural networks, short-term memory can play the role of retaining the response on temporary spikes for information filtering. In this study, the proposed complementary metal-oxide-semiconductor (CMOS)-compatible synaptic device mimics the potentiation and depression with varying pulse conditions similar to biological synapses in the nervous system. Short-term memory dynamics are demonstrated through pulse modulation at a set pulse voltage of -3.5 V and pulse width of 10 ms and paired-pulsed facilitation. Moreover, spike-timing-dependent plasticity with the change in synaptic weight is performed by the time difference between the pre- and postsynaptic neurons. The SiO layer as a tunnel barrier on a Si substrate provides highly nonlinear current-voltage (I-V) characteristics in a low-resistance state, which is suitable for high-density synapse arrays. The results herein presented confirm the viability of implementing a CMOS-compatible neuromorphic chip.
在本研究中，我们研究了用于神经形态计算系统的氮化钛/钛/二氧化钛/二氧化硅/硅电阻式随机存取存储器的突触功能，该系统可替代冯·诺依曼计算架构。为了高效处理数据，有必要将需要处理的信息与短期记忆进行协调。在神经网络中，短期记忆可以起到保留对临时尖峰的响应以进行信息过滤的作用。在本研究中，所提出的互补金属氧化物半导体（CMOS）兼容突触器件类似于神经系统中的生物突触，在不同脉冲条件下模拟增强和抑制。通过在-3.5 V的设定脉冲电压和10 ms的脉冲宽度下进行脉冲调制以及双脉冲易化来证明短期记忆动态。此外，突触权重变化的尖峰时间依赖性可塑性由突触前和突触后神经元之间的时间差执行。作为硅衬底上隧道势垒的二氧化硅层在低电阻状态下提供高度非线性的电流-电压（I-V）特性，这适用于高密度突触阵列。本文给出的结果证实了实现CMOS兼容神经形态芯片的可行性。
