Ecole Polytechnique Fédérale Lausanne, 1015 Lausanne, Switzerland.
Nature. 2011 Nov 16;479(7373):329-37. doi: 10.1038/nature10679.
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
功耗是纳米电子电路的一个基本问题。降低电源电压可以减少开关所需的能量，但当今集成电路中的场效应晶体管 (FET) 需要至少 60 mV 的栅极电压才能在室温下将电流增加一个数量级。隧道场效应晶体管 (Tunnel FET) 通过使用量子力学能带对带隧穿而不是热注入将电荷载流子注入器件通道来避免这种限制。基于超薄半导体薄膜或纳米线的隧道 FET 可以比互补金属氧化物半导体 (CMOS) 晶体管实现 100 倍的功率降低，因此将隧道 FET 与 CMOS 技术集成可以改善低功耗集成电路。
